Exemple
ppv-lite86 0.2.21
Échantillon vérifié pour cargo ppv-lite86 0.2.21. Le contrat s'est exécuté sur rust 1 · linux alpine/x64 · docker et a réussi.
sha256:73ee5b98736230b8b5e600c63676a19bd5ad06a1f38de1f607bb8561848875d7
Ce réseau offre une seule chose : un échantillon qui compile. Il l'a exécuté dans un bac à sable et conservé le reçu signé. Il ne note rien et ne garantit rien : si le même code compile chez vous, il ne l'a pas mesuré.
Combien de clés de signature distinctes ont déposé un reçu de contrat réussi. Une seule, c'est l'auteur ; plus d'une signifie que quelqu'un d'autre l'a compilé aussi. Une clé est auto-générée sans identité enregistrée derrière, donc on compte des clés, pas des personnes.
MIT-0
Preuves d'exécution
L'environnement déclaré et les exécutions signées sont séparés, pour que vous voyiez exactement ce que cet échantillon a exécuté et où.
- Base de preuve
- Contrat signé réussi
- Reçus de vérification
- 1
- Clés de signature qui l’ont compilé
- 1
Environnement déclaré
linux · alpine · musl x64 cargo
Environnements des exécutions de vérification
| Environnement | Contrat | Étapes | Exécution |
|---|---|---|---|
| rust 1 · linux alpine/x64 · docker ed25519:c1973797be207ac4 | PASS | compile:SKIPPED · contract:PASS · load:PASS · resolve:PASS CONTAINER_RUN · cargo@1rust:1-alpine@sha256:a10e64dd139b… |
2026-09-19 |
Cas
HOW- Objectif
- verify pkg:cargo/ppv-lite86@0.2.21
- Paquets
- Créé
- 2026-09-18T17:01:04Z
Contrat
- vec128_storage, vec256_storage, and vec512_storage convert between scalar arrays and vector representations
- dispatch macro selects SIMD machine implementation and executes vector arithmetic and word rotation
- Mach::u32x4 supports bitwise operations and Vec4 lane extraction and insertion
- LaneWords4 shuffles 32-bit words within 128-bit vector lanes
- StoreBytes reads and writes 128-bit vectors to and from byte slices in little-endian and big-endian order
- MultiLane combines 128-bit lane vectors into wider multi-lane vectors and splits them back
Fichiers
- Cargo.lock
- Cargo.toml
- PROMPT.md
- csx.json
- spec.json
- src/lib.rs
- test/contract.rs
Code source
# This file is automatically @generated by Cargo.
# It is not intended for manual editing.
version = 4
[[package]]
name = "ppv-lite86"
version = "0.2.21"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "85eae3c4ed2f50dcfe72643da4befc30deadb458a9b590d720cde2f2b1e97da9"
dependencies = [
"zerocopy",
]
[[package]]
name = "proc-macro2"
version = "1.0.107"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "985e7ec9bb745e6ce6535b544d84d6cd6f7ad8bd711c398938ae983b91a766d9"
dependencies = [
"unicode-ident",
]
[[package]]
name = "quote"
version = "1.0.47"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "1fbf4db142a473a8d80c26bbf18454ed458bf8d26c8219c331daecfdbd079001"
dependencies = [
"proc-macro2",
]
[[package]]
name = "sample-ppv-lite86"
version = "0.1.0"
dependencies = [
"ppv-lite86",
]
[[package]]
name = "syn"
version = "2.0.119"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "872831b642d1a07999a962a351ed35b955ea2cfc8f3862091e2a240a84f17297"
dependencies = [
"proc-macro2",
"quote",
"unicode-ident",
]
[[package]]
name = "unicode-ident"
version = "1.0.26"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "d245f478577f809a851594d02313b640fb437e0bb33866753cff937863096954"
[[package]]
name = "zerocopy"
version = "0.8.57"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "d35102a9f36d089ccae9e4c6802bc118be4487b80aaffc0ab4e0cf5ce92d2873"
dependencies = [
"zerocopy-derive",
]
[[package]]
name = "zerocopy-derive"
version = "0.8.57"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "146c01f5ab44258da43cf276c74a2763db2ff3969c9c652c3f2de07041d0b2bc"
dependencies = [
"proc-macro2",
"quote",
"syn",
]
[package]
name = "sample-ppv-lite86"
version = "0.1.0"
edition = "2021"
publish = false
[dependencies]
ppv-lite86 = { version = "=0.2.21", features = ["std"] }
[features]
default = ["std"]
std = []
[[bin]]
name = "contract"
path = "test/contract.rs"
Clean-room public code sample — generation instructions
Write a brand-new, minimal, self-contained code sample in this clean-room directory.
Do not copy, paraphrase, or reference any existing project source. Work only from this spec.
A csx.json manifest scaffold already exists. Do not recreate it from memory. Preserve its case.goal, packages and symbols; fill its empty case.contract with exact assertions and correct its environment, commands and verifierAdapter for the files you generate.
Goal: verify pkg:cargo/ppv-lite86@0.2.21
Kind: HOW
Use EXACTLY these public packages and versions:
- pkg:cargo/ppv-lite86@0.2.21
Rules:
- One focused purpose; the smallest project that proves the goal.
- Include a contract test (test/contract.*) that runs OFFLINE and exits 0 exactly when the goal behavior works.
- Pin every dependency with a lockfile so resolution is reproducible.
- No secrets, credentials, or tokens. No real URLs (only example.com or localhost). No absolute paths.
- No personal names, emails, company names, or project identifiers of any kind.
- No binaries and no generated output (node_modules, dist, target, venv, .git, .env).
- Keep it under 200 files and 256KB packed.
{"case":{"caseId":"case:sha256:3ef07bb42fbd09224a36c0dc36fc77593f6cb4ffdad7b8b3d1b99acd11b4904e","contract":["vec128_storage, vec256_storage, and vec512_storage convert between scalar arrays and vector representations","dispatch macro selects SIMD machine implementation and executes vector arithmetic and word rotation","Mach::u32x4 supports bitwise operations and Vec4 lane extraction and insertion","LaneWords4 shuffles 32-bit words within 128-bit vector lanes","StoreBytes reads and writes 128-bit vectors to and from byte slices in little-endian and big-endian order","MultiLane combines 128-bit lane vectors into wider multi-lane vectors and splits them back"],"goal":"verify pkg:cargo/ppv-lite86@0.2.21","kind":"HOW","packages":["pkg:cargo/ppv-lite86@0.2.21"],"schemaVersion":1},"contractCommand":["cargo","run","--offline"],"environment":{"arch":"x64","distro":"alpine","ecosystem":"cargo","libc":"musl","os":"linux","packageManager":"cargo","schemaVersion":1},"license":"MIT-0","packages":["pkg:cargo/ppv-lite86@0.2.21"],"schemaVersion":1,"subject":"pkg:cargo/ppv-lite86@0.2.21","verifierAdapter":"cargo@1"}
{
"schemaVersion": 1,
"goal": "verify pkg:cargo/ppv-lite86@0.2.21",
"kind": "HOW",
"packages": [
"pkg:cargo/ppv-lite86@0.2.21"
]
}
//! Clean-room verification sample for ppv-lite86.
pub use ppv_lite86::*;
use ppv_lite86::{
dispatch, vec128_storage, vec256_storage, vec512_storage,
LaneWords4, Machine, MultiLane, RotateEachWord32, StoreBytes, Vec4,
};
dispatch!(m, Mach, {
fn run_contract_checks() {
// 1. vec128_storage, vec256_storage, and vec512_storage conversion
let u32_arr = [0x11223344u32, 0x55667788u32, 0x99aabbccu32, 0xddeeff00u32];
let s128_a: vec128_storage = u32_arr.into();
let u32_back: [u32; 4] = s128_a.into();
assert_eq!(u32_arr, u32_back);
let u64_back: [u64; 2] = s128_a.into();
let expected_u64_0 = (u32_arr[0] as u64) | ((u32_arr[1] as u64) << 32);
assert_eq!(u64_back[0], expected_u64_0);
let s128_b: vec128_storage = [0x01020304u32, 0x05060708u32, 0x090a0b0cu32, 0x0d0e0f10u32].into();
let s256 = vec256_storage::new128([s128_a, s128_b]);
let s256_halves = s256.split128();
assert!(s256_halves[0] == s128_a);
assert!(s256_halves[1] == s128_b);
let s512 = vec512_storage::new128([s128_a, s128_b, s128_a, s128_b]);
let s512_quads = s512.split128();
assert!(s512_quads[0] == s128_a);
assert!(s512_quads[1] == s128_b);
assert!(s512_quads[2] == s128_a);
assert!(s512_quads[3] == s128_b);
// 2. dispatch macro selects SIMD machine implementation and executes vector arithmetic and word rotation
let va: Mach::u32x4 = m.vec([10, 20, 30, 40]);
let vb: Mach::u32x4 = m.vec([1, 2, 3, 4]);
let vsum = va + vb;
let sum_storage: vec128_storage = vsum.into();
let sum_arr: [u32; 4] = sum_storage.into();
assert_eq!(sum_arr, [11, 22, 33, 44]);
let rot_in: Mach::u32x4 = m.vec([0x12345678, 0x0000ffff, 0x80000000, 0x00000001]);
let rot16 = rot_in.rotate_each_word_right16();
let rot16_storage: vec128_storage = rot16.into();
let rot16_arr: [u32; 4] = rot16_storage.into();
assert_eq!(rot16_arr[0], 0x56781234);
let rot8 = rot_in.rotate_each_word_right8();
let rot8_storage: vec128_storage = rot8.into();
let rot8_arr: [u32; 4] = rot8_storage.into();
assert_eq!(rot8_arr[0], 0x78123456);
// 3. Mach::u32x4 supports bitwise operations and Vec4 lane extraction and insertion
let v_bit1: Mach::u32x4 = m.vec([0b1100, 0b1010, 0b1111, 0b0000]);
let v_bit2: Mach::u32x4 = m.vec([0b1010, 0b1100, 0b0011, 0b1111]);
let v_and = v_bit1 & v_bit2;
let v_or = v_bit1 | v_bit2;
let v_xor = v_bit1 ^ v_bit2;
assert_eq!(v_and.extract(0), 0b1000);
assert_eq!(v_or.extract(0), 0b1110);
assert_eq!(v_xor.extract(0), 0b0110);
let modified = v_bit1.insert(0x9999, 2);
assert_eq!(modified.extract(2), 0x9999);
assert_eq!(modified.extract(0), 0b1100);
// 4. LaneWords4 shuffles 32-bit words within 128-bit vector lanes
let v_lane: Mach::u32x4 = m.vec([1, 2, 3, 4]);
let shuf1230 = v_lane.shuffle_lane_words1230();
let shuf2301 = v_lane.shuffle_lane_words2301();
let shuf3012 = v_lane.shuffle_lane_words3012();
let s1230: vec128_storage = shuf1230.into();
let s2301: vec128_storage = shuf2301.into();
let s3012: vec128_storage = shuf3012.into();
let arr1230: [u32; 4] = s1230.into();
let arr2301: [u32; 4] = s2301.into();
let arr3012: [u32; 4] = s3012.into();
assert_eq!(arr1230, [4, 1, 2, 3]);
assert_eq!(arr2301, [3, 4, 1, 2]);
assert_eq!(arr3012, [2, 3, 4, 1]);
// 5. StoreBytes reads and writes 128-bit vectors to and from byte slices in little-endian and big-endian order
let raw_bytes: [u8; 16] = [
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
];
let v_from_le: Mach::u32x4 = m.read_le(&raw_bytes);
let mut out_le = [0u8; 16];
v_from_le.write_le(&mut out_le);
assert_eq!(raw_bytes, out_le);
let v_from_be: Mach::u32x4 = m.read_be(&raw_bytes);
let mut out_be = [0u8; 16];
v_from_be.write_be(&mut out_be);
assert_eq!(raw_bytes, out_be);
// 6. MultiLane combines 128-bit lane vectors into wider multi-lane vectors and splits them back
let l0: Mach::u32x4 = m.vec([1, 1, 1, 1]);
let l1: Mach::u32x4 = m.vec([2, 2, 2, 2]);
let l2: Mach::u32x4 = m.vec([3, 3, 3, 3]);
let l3: Mach::u32x4 = m.vec([4, 4, 4, 4]);
let wide: Mach::u32x4x4 = Mach::u32x4x4::from_lanes([l0, l1, l2, l3]);
let lanes: [Mach::u32x4; 4] = wide.to_lanes();
assert_eq!(lanes[0].extract(0), 1);
assert_eq!(lanes[1].extract(0), 2);
assert_eq!(lanes[2].extract(0), 3);
assert_eq!(lanes[3].extract(0), 4);
}
});
fn main() {
run_contract_checks();
println!("All ppv-lite86 contract assertions passed successfully.");
}
Seeder d'origine
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